DOI | Resolve DOI: https://doi.org/10.1088/1674-4926/32/11/115014 |
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Author | Search for: Huang, Y.; Search for: Zhang, Y.; Search for: Yin, Z.; Search for: Cui, G.; Search for: Liu, H.C.1; Search for: Bian, L.; Search for: Yang, H. |
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Affiliation | - National Research Council of Canada. NRC Institute for Microstructural Sciences
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Format | Text, Article |
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Subject | array; CMOS chips; CMOS circuits; Edge bead; Flip chip; Flip-chip bonding; GaAs/AlGaAs; indium bump; Indium bumps; small-size; Spatial light modulators; Via hole; CMOS integrated circuits; Flip chip devices; Light modulators; Photoresists; Semiconductor quantum wells; Indium |
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Abstract | We demonstrate a novel method for indium bump fabrication on a small CMOS circuit chip that is to be flip-chip bonded with a GaAs/AlGaAs multiple quantum well spatial light modulator. A chip holder with a via hole is used to coat the photoresist for indium bump lift-off. The 1000 μm-wide photoresist edge bead around the circuit chip can be reduced to less than 500 μm, which ensures the integrity of the indium bump array. 64 × 64 indium arrays with 20 μm-high, 30 μm-diameter bumps are successfully formed on a 5 × 6.5 mm2 CMOS chip. © 2011 Chinese Institute of Electronics. |
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Publication date | 2011 |
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In | |
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Language | English |
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Peer reviewed | Yes |
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NPARC number | 21271426 |
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Export citation | Export as RIS |
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Report a correction | Report a correction (opens in a new tab) |
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Record identifier | 5e98f7a8-bd29-4039-b125-47020e6e8a9f |
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Record created | 2014-03-24 |
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Record modified | 2020-04-21 |
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