| Abstract | Research in Automatic Speech Recognition (ASR) has been very intense in recent years with focus given to accuracy and speed issues. To achieve good accuracy, the employed techniques usually rely on heavy computations. Agbago and Barrière [2] earlier defined a Three-Stage Architecture (TSA) framework for ASR composed of (1) pre-processing stage, (2) phomene recognition stage, and (3) natural language post-processor stage. Within that TSA framework, our present focus is to improve the speed of Stage 2 which looks specifically at the comparison of low level speech units. It is different from several sytems that include HMM processes in this Stage (e.g. Shawn's [5]). We present a new algorithm called Parallel Recognizer that is 320 times faster than a standard Two-Level Dynamic programming (TLDP) [3]. In comparison, working on speed at low-level, Nkagawa [4] got a reduction of 4 to 6 the time needed to compute local distances in the improved DG algorithm of Sakoe [6]. |
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