| DOI | Trouver le DOI : https://doi.org/10.1143/JJAP.46.6586 |
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| Auteur | Rechercher : Chen, Jian-Hao; Rechercher : Lei, Tan-Fu; Rechercher : Landheer, Dolf1; Rechercher : Wu, Xiaohua1; Rechercher : Ma, Ming-Wen; Rechercher : Wu, Woei-Cherng; Rechercher : Yang, Tsung-Yu; Rechercher : Chao, Tien-Sheng |
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| Affiliation | - Conseil national de recherches du Canada. Institut des sciences des microstructures du CNRC
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| Format | Texte, Article |
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| Sujet | silicon nanocrystal; floating gate; MOSFET; nonvolatile memory; hemispherically shaped silicon |
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| Résumé | Silicon nanocrystal-embedded memories were fabricated by using the thermal agglomeration of an ultrathin (1.5 –1.8 nm) amorphous silicon (a-Si) film. The a-Si was deposited on a 4-nm tunnel-oxide layer by electron beam evaporation and subsequently annealed in situ at 850 oC for 5 min. Hemispherical Si nanocrystals were self-assembled, and nonvolatile memories were fabricated after depositing a 17-nm control-oxide layer. A threshold voltage window of 0.9V was achieved under write/erase (W/E) voltages of ±10 V, and good endurance characteristics up to 104 cycles were exhibited. Increasing W/E voltages created a large memory window (>2:7 V), and the retention characteristics showed little temperature dependence up to 85 oC. |
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| Date de publication | 2007 |
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| Dans | |
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| Numéro NPARC | 12744756 |
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| Exporter la notice | Exporter en format RIS |
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| Signaler une correction | Signaler une correction (s'ouvre dans un nouvel onglet) |
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| Identificateur de l’enregistrement | 0e78c051-d28f-495a-8449-c308a87d93c0 |
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| Enregistrement créé | 2009-10-27 |
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| Enregistrement modifié | 2020-05-10 |
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